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XDS MVIP/SCSA BRI S/T Interface Boards

The XDS Basic Rate Interface ISDN board provides 12 BRI ISDN ports. Each of these ports supports both B channels and the D channel, and can be configured as either a TE or NT on a per-port basis. The connection is an S interface. The B channels may be connected to either the MVIP bus or the SC bus through switching on the board, or they may be connected to each other.

In order to provide easy development, the XDS High Density BRI board includes a 25 MHz 80386 local processor. This on-board processor provides support for layers one, two and three, and includes TEI management, message buffering, and the LAPD protocol.

Flexible clocking is included with BRI span to PCM bus, or PCM bus to BRI span. The XDS BRI board provides the clock master and clock fall back.

Three DSPs supply call progress tone generation and detection, and DTMF generation and detection. The firmware for both the processor and the DSPs is stored in flash memory which allows for easy upgrading in the field.

The XDS High Density BRI board includes NI-1 and AT&T custom support. It is 8/16 bit ISA compliant, and is both MVIP-90 and SCSA compliant. DOS, OS/2, UNIXWARE, Windows NT, and Solaris drivers are available.

The XDS BRI board is designed to be compatible with other XDS boards, and shares a common interface structure with these boards. This makes it possible to construct a complex computer telephony system with a minimum of software effort.

Technology covered under patents 5420852, 5341368 and others.

 
 

 

 

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